This project demonstrates the **design of a 6-Transistor (6T) SRAM memory cell** using the **Electric VLSI Design System**. It includes only the **schematic and layout**—simulation and waveform ...
Timelok ⏳ – AI-powered HR & Attendance Management System. Built with Django, it includes face recognition attendance, smart employee-manager chat, AI chatbot (spaCy + Transformers), role-based access ...
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