EDN

VHDL simulator flags inadequately tested code

The CoValidator VHDL simulator and coverage analyzer, the first component of Impulse's forthcoming CoDeveloper hardware/software design suite, enables users to quickly identify specific lines of code ...
Electronic Design

VHDL/Verilog Simulator Shows 300% Speed Improvement

The new Active-HDL 4.2 Standard Edition shows a 300% simulation speed improvement over the previous 4.1 version for both VHDL and Verilog designs. Additionally, for Verilog designs, Active-HDL 4.2 ...
Semiconductor Engineering

Intermetrics VHDL simulator

The development of VHDL was initiated in 1981 by the United States Department of Defense (DoD) to address the hardware life cycle crisis.1983-85 Development of baseline language by Intermetrics, IBM ...
Design-Reuse

Dolphin Integration announces four times faster VHDL-AMS simulation with SMASH

Grenoble, France -- December 22nd, 2008 – DOLPHIN Integration announces the immediate availability of an update to SMASH 5.11 which delivers up to a four-fold acceleration of VHDL-AMS simulation ...
Electronic Design

Simulation Tools Speed Design Debug And Verification

Shorter time-to-market cycles and the increasing densities of both programmable logic devices (PLDs) and system-on-a-chip (SoC) ICs have made design simulation an essential part of the development ...
Hackaday

Simulating VHDL Of An AVR8 Soft Processor

Okay, now we’re beginning to feel a bit like [Alice]. This tutorial shows you how to simulate VHDL code. This code is intended to run on an FPGA and includes a software-only version of the AVR 8-bit ...
TechRepublic

Design and Simulation of 8255 Programmable Peripheral Interface Adapter Using VHDL

The 8255A Programmable Peripheral Interface (PPI) implements a general-purpose I/O interface to connect peripheral equipment to a microcomputer system bus. The core’s functional configuration is ...
mccormick.northwestern.edu

COMP_ENG 355: ASIC and FPGA Design

This course will introduce students to practical design methodologies for developing applications for FPGAs and ASICs. You will learn the fundamentals for FPGA and ASIC design through software coding ...
Ars Technica

Open Source VHDL (or similar) CPU Simulation Software

Hey all, my last semester of college we had to develop the microarchitecture for a RISC processor. My group was ultimately unsuccessful (our L2 cache had some serious issues), but I wouldn't mind ...
TechRepublic

Implementation of Digital QPSK Modulator by Using VHDL/MATLAB

The modulators are the basic requirement of the communication systems they are designed to reduce the channel distortion & to use in RF communication hence many type of carrier modulation techniques ...
Design-Reuse

Open-source Framework and Practical Considerations for Translating RTL VHDL to SystemC

SystemC has gained wide acceptance in the design of new digital IPs. However, there are numerous IPs already designed in VHDL. With the advances in SystemC ecosystem, like IEEE standardization, TLM-2 ...