Hackaday

Simulating VHDL Of An AVR8 Soft Processor

Okay, now we’re beginning to feel a bit like [Alice]. This tutorial shows you how to simulate VHDL code. This code is intended to run on an FPGA and includes a software-only version of the AVR 8-bit ...
Hackaday

Did You Know YoSys Knows VHDL Too?

We’ve been fans of the Yosys / Nextpnr open-source FPGA toolchain for a long while now, and like [Michael] we had no idea that their oss-cad-suite installer sets up everything so that you can write in ...
Electronic Design

VHDL Code Offloads LED Blinking Task To A CPLD

An earlier Idea For Design (“Hardware-Based LED Blinking Control Eliminates Software Overhead,” Sept. 27, 2007, p. 52) described a very interesting way to offload the software overhead required for a ...
TechRepublic

Implementation of Digital QPSK Modulator by Using VHDL/MATLAB

The modulators are the basic requirement of the communication systems they are designed to reduce the channel distortion & to use in RF communication hence many type of carrier modulation techniques ...
EDN

VHDL 101 – Tick Tock Processing Clocks

So far we have been looking at the more basic structure of VHDL and using combinational logic circuits. In this article, however, we will look at how to use and interface clock signals, the beating ...
EDN

Product how-to: Achieving STARC and DO-254 compliance using HDL Coder-generated code

HDL Coder generates target independent, synthesizable Verilog and VHDL code from MATLAB functions, Simulink models, and Stateflow charts. The generated HDL code is bit-true and cycle-accurate to ...
Semiconductor Engineering

Customizing An LLM Tailored Specifically For VHDL Code And Design Of High Performance Processors (IBM)

A new technical paper titled “Customizing a Large Language Model for VHDL Design of High-Performance Microprocessors” was published by researchers at IBM. “The use of Large Language Models (LLMs) in ...