EDN

SIGNAL CHAIN BASICS #41: Clock Jitter Demystified

As consumers thirst for the high-definition experiences delivered by expanding amounts of signal bandwidth, design challenges related to clocking become increasingly difficult and complicated. The ...
Hackaday

Atomic Clock Trades Receiver For An ESP8266

The advantage of a radio-controlled clock that receives the time signal from WWVB is that you never have to set it again. Whether it’s a little digital job on your desk, or some big analog wall clock ...
Electronic Design

Measuring digital clock stability and jitter with an oscilloscope

Clocks are the heartbeats of embedded systems, providing timing references and synchronization between components, subsystems, and entire systems. Incorrect clock signal amplitudes and timing can ...
Semiconductor Engineering

Clocks Getting Skewed Up

At a logical level, synchronous designs are very simple and the clock just happens. But the clocking network is possibly the most complex in a chip, and it’s fraught with the most problems at the ...
Semiconductor Engineering

The Design Challenges Of Clock Integrity And Clock Jitter

Signal integrity is one of the many challenges faced by chip designers. Deep submicron technologies are unfriendly hosts for the nice, clean signals desired. The culprits that compromise signal ...
Electronic Design

Vernier Optical Combs Plus Heterodyned Electronics Yield Atomic Clock

There are significantly different architectures for what are known as “atomic” clocks. Optically driven atomic clocks offer a new set of performance attributes. The optical atomic clocks use paired ...
EDN

SIGNAL CHAIN BASICS #61: Clock jitter demystified-random jitter and phase noise, Part 2

Editor's note: Signal Chain Basics is an ongoing and popular series; click here for a complete, linked list of all installments.) In Signal Chain Basics Part 56 we discussed the fundamental ...