Managing the power consumption of ICs is an increasingly difficult challenge, because each new generation of portable device includes expanded features and demands longer battery lives.

Wire delay is beginning to dominate gate delay in current CMOS technologies. According to Moore’s Law by 2016 CMOS feature size should be on the order of 22 nm with clock frequencies reaching around ...

Today, FPGA designers are using these flexible devices to perform everything from simple glue logic tasks to implementing complicated system on a chip (SoC) functions. The efficiency and ease of ...